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Searched refs:SYSCON_FLEXFRG1CTRL_DIV_MASK (Results 1 – 21 of 21) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h22358 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
22362 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h22205 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
22209 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h22205 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
22209 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h22358 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
22362 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h22358 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
22362 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h22205 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
22209 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5526/
DLPC5526.h21351 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
21355 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S06/
DLPC55S06.h24626 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
24630 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S04/
DLPC55S04.h24626 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
24630 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5528/
DLPC5528.h21350 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
21354 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5512/
DLPC5512.h23263 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
23267 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h23007 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
23011 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h23006 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
23010 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5514/
DLPC5514.h23264 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
23268 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S16/
DLPC55S16.h25533 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
25537 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S14/
DLPC55S14.h25532 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
25536 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5516/
DLPC5516.h23265 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
23269 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core1.h23627 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
23631 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
DLPC55S66_cm33_core0.h23627 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
23631 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core1.h23626 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
23630 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)
DLPC55S69_cm33_core0.h23626 #define SYSCON_FLEXFRG1CTRL_DIV_MASK (0xFFU) macro
23630 … (((uint32_t)(((uint32_t)(x)) << SYSCON_FLEXFRG1CTRL_DIV_SHIFT)) & SYSCON_FLEXFRG1CTRL_DIV_MASK)