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Searched refs:SYSCON_CPUCFG_CPU1ENABLE_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core1.h25298 #define SYSCON_CPUCFG_CPU1ENABLE_MASK (0x4U) macro
25304 … (((uint32_t)(((uint32_t)(x)) << SYSCON_CPUCFG_CPU1ENABLE_SHIFT)) & SYSCON_CPUCFG_CPU1ENABLE_MASK)
DLPC55S66_cm33_core0.h25298 #define SYSCON_CPUCFG_CPU1ENABLE_MASK (0x4U) macro
25304 … (((uint32_t)(((uint32_t)(x)) << SYSCON_CPUCFG_CPU1ENABLE_SHIFT)) & SYSCON_CPUCFG_CPU1ENABLE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core1.h25297 #define SYSCON_CPUCFG_CPU1ENABLE_MASK (0x4U) macro
25303 … (((uint32_t)(((uint32_t)(x)) << SYSCON_CPUCFG_CPU1ENABLE_SHIFT)) & SYSCON_CPUCFG_CPU1ENABLE_MASK)
DLPC55S69_cm33_core0.h25297 #define SYSCON_CPUCFG_CPU1ENABLE_MASK (0x4U) macro
25303 … (((uint32_t)(((uint32_t)(x)) << SYSCON_CPUCFG_CPU1ENABLE_SHIFT)) & SYSCON_CPUCFG_CPU1ENABLE_MASK)