Home
last modified time | relevance | path

Searched refs:SYSCON_AHBCLKCTRL3_OPAMP2_MASK (Results 1 – 11 of 11) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h42221 #define SYSCON_AHBCLKCTRL3_OPAMP2_MASK (0x4000U) macro
42227 …(((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL3_OPAMP2_SHIFT)) & SYSCON_AHBCLKCTRL3_OPAMP2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h42221 #define SYSCON_AHBCLKCTRL3_OPAMP2_MASK (0x4000U) macro
42227 …(((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL3_OPAMP2_SHIFT)) & SYSCON_AHBCLKCTRL3_OPAMP2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h51926 #define SYSCON_AHBCLKCTRL3_OPAMP2_MASK (0x4000U) macro
51932 …(((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL3_OPAMP2_SHIFT)) & SYSCON_AHBCLKCTRL3_OPAMP2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h71512 #define SYSCON_AHBCLKCTRL3_OPAMP2_MASK (0x8000U) macro
71518 …(((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL3_OPAMP2_SHIFT)) & SYSCON_AHBCLKCTRL3_OPAMP2_MASK)
DMCXN546_cm33_core1.h71512 #define SYSCON_AHBCLKCTRL3_OPAMP2_MASK (0x8000U) macro
71518 …(((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL3_OPAMP2_SHIFT)) & SYSCON_AHBCLKCTRL3_OPAMP2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h71512 #define SYSCON_AHBCLKCTRL3_OPAMP2_MASK (0x8000U) macro
71518 …(((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL3_OPAMP2_SHIFT)) & SYSCON_AHBCLKCTRL3_OPAMP2_MASK)
DMCXN547_cm33_core1.h71512 #define SYSCON_AHBCLKCTRL3_OPAMP2_MASK (0x8000U) macro
71518 …(((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL3_OPAMP2_SHIFT)) & SYSCON_AHBCLKCTRL3_OPAMP2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h74178 #define SYSCON_AHBCLKCTRL3_OPAMP2_MASK (0x8000U) macro
74184 …(((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL3_OPAMP2_SHIFT)) & SYSCON_AHBCLKCTRL3_OPAMP2_MASK)
DMCXN947_cm33_core0.h74178 #define SYSCON_AHBCLKCTRL3_OPAMP2_MASK (0x8000U) macro
74184 …(((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL3_OPAMP2_SHIFT)) & SYSCON_AHBCLKCTRL3_OPAMP2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h74178 #define SYSCON_AHBCLKCTRL3_OPAMP2_MASK (0x8000U) macro
74184 …(((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL3_OPAMP2_SHIFT)) & SYSCON_AHBCLKCTRL3_OPAMP2_MASK)
DMCXN946_cm33_core1.h74178 #define SYSCON_AHBCLKCTRL3_OPAMP2_MASK (0x8000U) macro
74184 …(((uint32_t)(((uint32_t)(x)) << SYSCON_AHBCLKCTRL3_OPAMP2_SHIFT)) & SYSCON_AHBCLKCTRL3_OPAMP2_MASK)