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Searched refs:SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (Results 1 – 24 of 24) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/
DLPC5502.h21692 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
21698 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502CPXXXX/
DLPC5502CPXXXX.h21539 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
21545 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504CPXXXX/
DLPC5504CPXXXX.h21539 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
21545 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5504/
DLPC5504.h21692 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
21698 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506/
DLPC5506.h21692 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
21698 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/
DLPC5506CPXXXX.h21539 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
21545 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5526/
DLPC5526.h20675 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
20681 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S06/
DLPC55S06.h23960 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
23966 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S04/
DLPC55S04.h23960 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
23966 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5528/
DLPC5528.h20674 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
20680 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5512/
DLPC5512.h22567 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
22573 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h22331 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
22337 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h22330 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
22336 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5514/
DLPC5514.h22568 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
22574 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S16/
DLPC55S16.h24837 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
24843 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S14/
DLPC55S14.h24836 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
24842 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5516/
DLPC5516.h22569 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
22575 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core1.h22933 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
22939 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
DLPC55S66_cm33_core0.h22933 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
22939 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core1.h22932 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
22938 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
DLPC55S69_cm33_core0.h22932 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
22938 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h42113 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
42119 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h42113 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
42119 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h51818 #define SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK (0x40000000U) macro
51824 …(((uint32_t)(x)) << SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_SHIFT)) & SYSCON_AHBCLKCTRL2_GPIO_SEC_INT_MASK)