Home
last modified time | relevance | path

Searched refs:SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h53901 #define SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (0x3000U) macro
53907 …)) << SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_SHIFT)) & SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK)
DMIMXRT735S_cm33_core1.h53961 #define SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (0x3000U) macro
53967 …)) << SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_SHIFT)) & SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK)
DMIMXRT735S_ezhv.h81904 #define SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (0x3000U) macro
81910 …)) << SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_SHIFT)) & SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK)
DMIMXRT735S_cm33_core0.h76985 #define SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (0x3000U) macro
76991 …)) << SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_SHIFT)) & SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h57184 #define SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (0x3000U) macro
57190 …)) << SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_SHIFT)) & SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK)
DMIMXRT758S_hifi1.h57122 #define SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (0x3000U) macro
57128 …)) << SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_SHIFT)) & SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK)
DMIMXRT758S_cm33_core0.h80210 #define SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (0x3000U) macro
80216 …)) << SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_SHIFT)) & SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK)
DMIMXRT758S_ezhv.h85049 #define SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (0x3000U) macro
85055 …)) << SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_SHIFT)) & SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h57122 #define SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (0x3000U) macro
57128 …)) << SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_SHIFT)) & SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK)
DMIMXRT798S_cm33_core1.h57184 #define SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (0x3000U) macro
57190 …)) << SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_SHIFT)) & SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK)
DMIMXRT798S_hifi4.h80123 #define SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (0x3000U) macro
80129 …)) << SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_SHIFT)) & SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK)
DMIMXRT798S_cm33_core0.h80210 #define SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (0x3000U) macro
80216 …)) << SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_SHIFT)) & SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK)
DMIMXRT798S_ezhv.h85073 #define SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK (0x3000U) macro
85079 …)) << SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_SHIFT)) & SYSCON3_DEBUG_FEATURES_DP_CPU1_SPNIDEN_MASK)