Home
last modified time | relevance | path

Searched refs:SYSCON3_CPU_STATUS_CPU_WAIT_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h53340 #define SYSCON3_CPU_STATUS_CPU_WAIT_MASK (0x1U) macro
53346 …int32_t)(((uint32_t)(x)) << SYSCON3_CPU_STATUS_CPU_WAIT_SHIFT)) & SYSCON3_CPU_STATUS_CPU_WAIT_MASK)
DMIMXRT735S_cm33_core1.h53400 #define SYSCON3_CPU_STATUS_CPU_WAIT_MASK (0x1U) macro
53406 …int32_t)(((uint32_t)(x)) << SYSCON3_CPU_STATUS_CPU_WAIT_SHIFT)) & SYSCON3_CPU_STATUS_CPU_WAIT_MASK)
DMIMXRT735S_ezhv.h81343 #define SYSCON3_CPU_STATUS_CPU_WAIT_MASK (0x1U) macro
81349 …int32_t)(((uint32_t)(x)) << SYSCON3_CPU_STATUS_CPU_WAIT_SHIFT)) & SYSCON3_CPU_STATUS_CPU_WAIT_MASK)
DMIMXRT735S_cm33_core0.h76424 #define SYSCON3_CPU_STATUS_CPU_WAIT_MASK (0x1U) macro
76430 …int32_t)(((uint32_t)(x)) << SYSCON3_CPU_STATUS_CPU_WAIT_SHIFT)) & SYSCON3_CPU_STATUS_CPU_WAIT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h56623 #define SYSCON3_CPU_STATUS_CPU_WAIT_MASK (0x1U) macro
56629 …int32_t)(((uint32_t)(x)) << SYSCON3_CPU_STATUS_CPU_WAIT_SHIFT)) & SYSCON3_CPU_STATUS_CPU_WAIT_MASK)
DMIMXRT758S_hifi1.h56561 #define SYSCON3_CPU_STATUS_CPU_WAIT_MASK (0x1U) macro
56567 …int32_t)(((uint32_t)(x)) << SYSCON3_CPU_STATUS_CPU_WAIT_SHIFT)) & SYSCON3_CPU_STATUS_CPU_WAIT_MASK)
DMIMXRT758S_cm33_core0.h79649 #define SYSCON3_CPU_STATUS_CPU_WAIT_MASK (0x1U) macro
79655 …int32_t)(((uint32_t)(x)) << SYSCON3_CPU_STATUS_CPU_WAIT_SHIFT)) & SYSCON3_CPU_STATUS_CPU_WAIT_MASK)
DMIMXRT758S_ezhv.h84488 #define SYSCON3_CPU_STATUS_CPU_WAIT_MASK (0x1U) macro
84494 …int32_t)(((uint32_t)(x)) << SYSCON3_CPU_STATUS_CPU_WAIT_SHIFT)) & SYSCON3_CPU_STATUS_CPU_WAIT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h56561 #define SYSCON3_CPU_STATUS_CPU_WAIT_MASK (0x1U) macro
56567 …int32_t)(((uint32_t)(x)) << SYSCON3_CPU_STATUS_CPU_WAIT_SHIFT)) & SYSCON3_CPU_STATUS_CPU_WAIT_MASK)
DMIMXRT798S_cm33_core1.h56623 #define SYSCON3_CPU_STATUS_CPU_WAIT_MASK (0x1U) macro
56629 …int32_t)(((uint32_t)(x)) << SYSCON3_CPU_STATUS_CPU_WAIT_SHIFT)) & SYSCON3_CPU_STATUS_CPU_WAIT_MASK)
DMIMXRT798S_hifi4.h79562 #define SYSCON3_CPU_STATUS_CPU_WAIT_MASK (0x1U) macro
79568 …int32_t)(((uint32_t)(x)) << SYSCON3_CPU_STATUS_CPU_WAIT_SHIFT)) & SYSCON3_CPU_STATUS_CPU_WAIT_MASK)
DMIMXRT798S_cm33_core0.h79649 #define SYSCON3_CPU_STATUS_CPU_WAIT_MASK (0x1U) macro
79655 …int32_t)(((uint32_t)(x)) << SYSCON3_CPU_STATUS_CPU_WAIT_SHIFT)) & SYSCON3_CPU_STATUS_CPU_WAIT_MASK)
DMIMXRT798S_ezhv.h84512 #define SYSCON3_CPU_STATUS_CPU_WAIT_MASK (0x1U) macro
84518 …int32_t)(((uint32_t)(x)) << SYSCON3_CPU_STATUS_CPU_WAIT_SHIFT)) & SYSCON3_CPU_STATUS_CPU_WAIT_MASK)