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Searched refs:SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h52946 #define SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
52952 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK)
DMIMXRT735S_cm33_core1.h53006 #define SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
53012 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK)
DMIMXRT735S_ezhv.h80987 #define SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
80993 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h56229 #define SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
56235 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK)
DMIMXRT758S_hifi1.h56167 #define SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
56173 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK)
DMIMXRT758S_ezhv.h84132 #define SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
84138 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h56167 #define SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
56173 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK)
DMIMXRT798S_cm33_core1.h56229 #define SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
56235 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK)
DMIMXRT798S_ezhv.h84156 #define SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
84162 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO9_DMA0_EN_MASK)