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Searched refs:SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h52938 #define SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
52944 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK)
DMIMXRT735S_cm33_core1.h52998 #define SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
53004 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK)
DMIMXRT735S_ezhv.h80979 #define SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
80985 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h56221 #define SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
56227 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK)
DMIMXRT758S_hifi1.h56159 #define SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
56165 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK)
DMIMXRT758S_ezhv.h84124 #define SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
84130 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h56159 #define SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
56165 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK)
DMIMXRT798S_cm33_core1.h56221 #define SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
56227 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK)
DMIMXRT798S_ezhv.h84148 #define SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
84154 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA3_EN1_GPIO8_DMA1_EN_MASK)