Searched refs:SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK (Results 1 – 9 of 9) sorted by relevance
52630 #define SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK (0x40U) macro52636 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_SHIFT)) & SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK)
52690 #define SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK (0x40U) macro52696 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_SHIFT)) & SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK)
80671 #define SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK (0x40U) macro80677 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_SHIFT)) & SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK)
55913 #define SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK (0x40U) macro55919 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_SHIFT)) & SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK)
55851 #define SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK (0x40U) macro55857 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_SHIFT)) & SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK)
83816 #define SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK (0x40U) macro83822 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_SHIFT)) & SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK)
83840 #define SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK (0x40U) macro83846 …(((uint32_t)(x)) << SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_SHIFT)) & SYSCON1_EDMA3_EN0_PINT1_IRQ2_EN_MASK)
