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Searched refs:SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h52538 #define SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
52544 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK)
DMIMXRT735S_cm33_core1.h52598 #define SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
52604 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK)
DMIMXRT735S_ezhv.h80579 #define SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
80585 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h55821 #define SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
55827 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK)
DMIMXRT758S_hifi1.h55759 #define SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
55765 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK)
DMIMXRT758S_ezhv.h83724 #define SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
83730 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h55759 #define SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
55765 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK)
DMIMXRT798S_cm33_core1.h55821 #define SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
55827 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK)
DMIMXRT798S_ezhv.h83748 #define SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK (0x8000U) macro
83754 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO9_DMA0_EN_MASK)