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Searched refs:SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h52530 #define SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
52536 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK)
DMIMXRT735S_cm33_core1.h52590 #define SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
52596 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK)
DMIMXRT735S_ezhv.h80571 #define SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
80577 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h55813 #define SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
55819 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK)
DMIMXRT758S_hifi1.h55751 #define SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
55757 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK)
DMIMXRT758S_ezhv.h83716 #define SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
83722 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h55751 #define SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
55757 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK)
DMIMXRT798S_cm33_core1.h55813 #define SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
55819 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK)
DMIMXRT798S_ezhv.h83740 #define SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK (0x4000U) macro
83746 …(((uint32_t)(x)) << SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_SHIFT)) & SYSCON1_EDMA2_EN1_GPIO8_DMA1_EN_MASK)