Home
last modified time | relevance | path

Searched refs:SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h77971 #define SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK (0x4000U) macro
77977 …t32_t)(((uint32_t)(x)) << SYSCON0_EDMA1_EN2_I3C0_TX_EN_SHIFT)) & SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK)
DMIMXRT798S_cm33_core0.h78058 #define SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK (0x4000U) macro
78064 …t32_t)(((uint32_t)(x)) << SYSCON0_EDMA1_EN2_I3C0_TX_EN_SHIFT)) & SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK)
DMIMXRT798S_ezhv.h81700 #define SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK (0x4000U) macro
81706 …t32_t)(((uint32_t)(x)) << SYSCON0_EDMA1_EN2_I3C0_TX_EN_SHIFT)) & SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h78531 #define SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK (0x4000U) macro
78537 …t32_t)(((uint32_t)(x)) << SYSCON0_EDMA1_EN2_I3C0_TX_EN_SHIFT)) & SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK)
DMIMXRT735S_cm33_core0.h74833 #define SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK (0x4000U) macro
74839 …t32_t)(((uint32_t)(x)) << SYSCON0_EDMA1_EN2_I3C0_TX_EN_SHIFT)) & SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h78058 #define SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK (0x4000U) macro
78064 …t32_t)(((uint32_t)(x)) << SYSCON0_EDMA1_EN2_I3C0_TX_EN_SHIFT)) & SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK)
DMIMXRT758S_ezhv.h81676 #define SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK (0x4000U) macro
81682 …t32_t)(((uint32_t)(x)) << SYSCON0_EDMA1_EN2_I3C0_TX_EN_SHIFT)) & SYSCON0_EDMA1_EN2_I3C0_TX_EN_MASK)