Searched refs:SW_PAD_CTL_PAD_SD3_DATA7 (Results 1 – 2 of 2) sorted by relevance
15996 __IO uint32_t SW_PAD_CTL_PAD_SD3_DATA7; /**< Pad Control Register, offset: 0x5BC */ member16545 #define IOMUXC_SW_PAD_CTL_PAD_SD3_DATA7_REG(base) ((base)->SW_PAD_CTL_PAD_SD3_DATA7)
21922 …__IO uint32_t SW_PAD_CTL_PAD_SD3_DATA7; /**< SW_PAD_CTL_PAD_SD3_DATA7 SW PAD Contro… member22393 #define IOMUXC_SW_PAD_CTL_PAD_SD3_DATA7_REG(base) ((base)->SW_PAD_CTL_PAD_SD3_DATA7)
