Searched refs:SW_PAD_CTL_PAD_SD3_DATA2 (Results 1 – 2 of 2) sorted by relevance
15991 __IO uint32_t SW_PAD_CTL_PAD_SD3_DATA2; /**< Pad Control Register, offset: 0x5A8 */ member16540 #define IOMUXC_SW_PAD_CTL_PAD_SD3_DATA2_REG(base) ((base)->SW_PAD_CTL_PAD_SD3_DATA2)
21917 …__IO uint32_t SW_PAD_CTL_PAD_SD3_DATA2; /**< SW_PAD_CTL_PAD_SD3_DATA2 SW PAD Contro… member22388 #define IOMUXC_SW_PAD_CTL_PAD_SD3_DATA2_REG(base) ((base)->SW_PAD_CTL_PAD_SD3_DATA2)
