Searched refs:SW_PAD_CTL_PAD_SD3_CLK (Results 1 – 2 of 2) sorted by relevance
15987 __IO uint32_t SW_PAD_CTL_PAD_SD3_CLK; /**< Pad Control Register, offset: 0x598 */ member16536 #define IOMUXC_SW_PAD_CTL_PAD_SD3_CLK_REG(base) ((base)->SW_PAD_CTL_PAD_SD3_CLK)
21913 …__IO uint32_t SW_PAD_CTL_PAD_SD3_CLK; /**< SW_PAD_CTL_PAD_SD3_CLK SW PAD Control … member22384 #define IOMUXC_SW_PAD_CTL_PAD_SD3_CLK_REG(base) ((base)->SW_PAD_CTL_PAD_SD3_CLK)
