Searched refs:SW_PAD_CTL_PAD_SD1_DATA3 (Results 1 – 2 of 2) sorted by relevance
15980 __IO uint32_t SW_PAD_CTL_PAD_SD1_DATA3; /**< Pad Control Register, offset: 0x57C */ member16529 #define IOMUXC_SW_PAD_CTL_PAD_SD1_DATA3_REG(base) ((base)->SW_PAD_CTL_PAD_SD1_DATA3)
21903 …__IO uint32_t SW_PAD_CTL_PAD_SD1_DATA3; /**< SW_PAD_CTL_PAD_SD1_DATA3 SW PAD Contro… member22374 #define IOMUXC_SW_PAD_CTL_PAD_SD1_DATA3_REG(base) ((base)->SW_PAD_CTL_PAD_SD1_DATA3)
