Searched refs:SW_PAD_CTL_PAD_SD1_DATA0 (Results 1 – 2 of 2) sorted by relevance
15977 __IO uint32_t SW_PAD_CTL_PAD_SD1_DATA0; /**< Pad Control Register, offset: 0x570 */ member16526 #define IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0_REG(base) ((base)->SW_PAD_CTL_PAD_SD1_DATA0)
21900 …__IO uint32_t SW_PAD_CTL_PAD_SD1_DATA0; /**< SW_PAD_CTL_PAD_SD1_DATA0 SW PAD Contro… member22371 #define IOMUXC_SW_PAD_CTL_PAD_SD1_DATA0_REG(base) ((base)->SW_PAD_CTL_PAD_SD1_DATA0)
