Searched refs:SW_PAD_CTL_PAD_SD1_CLK (Results 1 – 2 of 2) sorted by relevance
15975 __IO uint32_t SW_PAD_CTL_PAD_SD1_CLK; /**< Pad Control Register, offset: 0x568 */ member16524 #define IOMUXC_SW_PAD_CTL_PAD_SD1_CLK_REG(base) ((base)->SW_PAD_CTL_PAD_SD1_CLK)
21898 …__IO uint32_t SW_PAD_CTL_PAD_SD1_CLK; /**< SW_PAD_CTL_PAD_SD1_CLK SW PAD Control … member22369 #define IOMUXC_SW_PAD_CTL_PAD_SD1_CLK_REG(base) ((base)->SW_PAD_CTL_PAD_SD1_CLK)
