Searched refs:SW_PAD_CTL_PAD_QSPI1A_SS1_B (Results 1 – 1 of 1) sorted by relevance
15942 __IO uint32_t SW_PAD_CTL_PAD_QSPI1A_SS1_B; /**< Pad Control Register, offset: 0x4E4 */ member16491 #define IOMUXC_SW_PAD_CTL_PAD_QSPI1A_SS1_B_REG(base) ((base)->SW_PAD_CTL_PAD_QSPI1A_SS1_B)
