Searched refs:SW_PAD_CTL_PAD_QSPI1A_DQS (Results 1 – 1 of 1) sorted by relevance
15939 __IO uint32_t SW_PAD_CTL_PAD_QSPI1A_DQS; /**< Pad Control Register, offset: 0x4D8 */ member16488 #define IOMUXC_SW_PAD_CTL_PAD_QSPI1A_DQS_REG(base) ((base)->SW_PAD_CTL_PAD_QSPI1A_DQS)
