Searched refs:SW_PAD_CTL_PAD_LCD1_HSYNC (Results 1 – 1 of 1) sorted by relevance
15916 __IO uint32_t SW_PAD_CTL_PAD_LCD1_HSYNC; /**< Pad Control Register, offset: 0x47C */ member16465 #define IOMUXC_SW_PAD_CTL_PAD_LCD1_HSYNC_REG(base) ((base)->SW_PAD_CTL_PAD_LCD1_HSYNC)
