Home
last modified time | relevance | path

Searched refs:SW_PAD_CTL_PAD_GPIO1_IO11 (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h15855 __IO uint32_t SW_PAD_CTL_PAD_GPIO1_IO11; /**< Pad Control Register, offset: 0x388 */ member
16404 #define IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO11_REG(base) ((base)->SW_PAD_CTL_PAD_GPIO1_IO11)
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h21799 …__IO uint32_t SW_PAD_CTL_PAD_GPIO1_IO11; /**< SW_PAD_CTL_PAD_GPIO1_IO11 SW PAD Contr… member
22270 #define IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO11_REG(base) ((base)->SW_PAD_CTL_PAD_GPIO1_IO11)