Searched refs:SW_PAD_CTL_PAD_GPIO1_IO02 (Results 1 – 2 of 2) sorted by relevance
15846 __IO uint32_t SW_PAD_CTL_PAD_GPIO1_IO02; /**< Pad Control Register, offset: 0x364 */ member16395 #define IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO02_REG(base) ((base)->SW_PAD_CTL_PAD_GPIO1_IO02)
27246 …__IO uint32_t SW_PAD_CTL_PAD_GPIO1_IO02; /**< SW_PAD_CTL_PAD_GPIO1_IO02 SW PAD Contr… member27278 #define IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO02_REG(base) ((base)->SW_PAD_CTL_PAD_GPIO1_IO02)
