Searched refs:SW_PAD_CTL_PAD_GPIO1_IO01 (Results 1 – 2 of 2) sorted by relevance
15845 __IO uint32_t SW_PAD_CTL_PAD_GPIO1_IO01; /**< Pad Control Register, offset: 0x360 */ member16394 #define IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO01_REG(base) ((base)->SW_PAD_CTL_PAD_GPIO1_IO01)
27245 …__IO uint32_t SW_PAD_CTL_PAD_GPIO1_IO01; /**< SW_PAD_CTL_PAD_GPIO1_IO01 SW PAD Contr… member27277 #define IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO01_REG(base) ((base)->SW_PAD_CTL_PAD_GPIO1_IO01)
