Searched refs:SW_PAD_CTL_PAD_ENET2_RX_CLK (Results 1 – 1 of 1) sorted by relevance
15878 __IO uint32_t SW_PAD_CTL_PAD_ENET2_RX_CLK; /**< Pad Control Register, offset: 0x3E4 */ member16427 #define IOMUXC_SW_PAD_CTL_PAD_ENET2_RX_CLK_REG(base) ((base)->SW_PAD_CTL_PAD_ENET2_RX_CLK)
