Searched refs:SW_PAD_CTL_PAD_ENET1_MDIO (Results 1 – 1 of 1) sorted by relevance
15873 __IO uint32_t SW_PAD_CTL_PAD_ENET1_MDIO; /**< Pad Control Register, offset: 0x3D0 */ member16422 #define IOMUXC_SW_PAD_CTL_PAD_ENET1_MDIO_REG(base) ((base)->SW_PAD_CTL_PAD_ENET1_MDIO)
