Searched refs:SW_PAD_CTL_PAD_ENET1_CRS (Results 1 – 2 of 2) sorted by relevance
15871 __IO uint32_t SW_PAD_CTL_PAD_ENET1_CRS; /**< Pad Control Register, offset: 0x3C8 */ member16420 #define IOMUXC_SW_PAD_CTL_PAD_ENET1_CRS_REG(base) ((base)->SW_PAD_CTL_PAD_ENET1_CRS)
21950 …__IO uint32_t SW_PAD_CTL_PAD_ENET1_CRS; /**< SW_PAD_CTL_PAD_ENET1_CRS SW PAD Contro… member22421 #define IOMUXC_SW_PAD_CTL_PAD_ENET1_CRS_REG(base) ((base)->SW_PAD_CTL_PAD_ENET1_CRS)
