Searched refs:SW_PAD_CTL_PAD_DRAM_SDBA0 (Results 1 – 1 of 1) sorted by relevance
15827 __IO uint32_t SW_PAD_CTL_PAD_DRAM_SDBA0; /**< Pad Control Register, offset: 0x318 */ member16376 #define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDBA0_REG(base) ((base)->SW_PAD_CTL_PAD_DRAM_SDBA0)
