Searched refs:SW_PAD_CTL_PAD_DRAM_RESET (Results 1 – 1 of 1) sorted by relevance
15837 __IO uint32_t SW_PAD_CTL_PAD_DRAM_RESET; /**< Pad Control Register, offset: 0x340 */ member16386 #define IOMUXC_SW_PAD_CTL_PAD_DRAM_RESET_REG(base) ((base)->SW_PAD_CTL_PAD_DRAM_RESET)
