Searched refs:SW_PAD_CTL_PAD_DRAM_ODT0 (Results 1 – 1 of 1) sorted by relevance
15825 __IO uint32_t SW_PAD_CTL_PAD_DRAM_ODT0; /**< Pad Control Register, offset: 0x310 */ member16374 #define IOMUXC_SW_PAD_CTL_PAD_DRAM_ODT0_REG(base) ((base)->SW_PAD_CTL_PAD_DRAM_ODT0)
