Searched refs:SW_PAD_CTL_PAD_DRAM_ADDR07 (Results 1 – 1 of 1) sorted by relevance
15807 __IO uint32_t SW_PAD_CTL_PAD_DRAM_ADDR07; /**< Pad Control Register, offset: 0x2C8 */ member16356 #define IOMUXC_SW_PAD_CTL_PAD_DRAM_ADDR07_REG(base) ((base)->SW_PAD_CTL_PAD_DRAM_ADDR07)
