Searched refs:SW_PAD_CTL_PAD_CSI_HSYNC (Results 1 – 1 of 1) sorted by relevance
15866 __IO uint32_t SW_PAD_CTL_PAD_CSI_HSYNC; /**< Pad Control Register, offset: 0x3B4 */ member16415 #define IOMUXC_SW_PAD_CTL_PAD_CSI_HSYNC_REG(base) ((base)->SW_PAD_CTL_PAD_CSI_HSYNC)
