Searched refs:SW_MUX_CTL_PAD_SD3_DATA5 (Results 1 – 2 of 2) sorted by relevance
15784 __IO uint32_t SW_MUX_CTL_PAD_SD3_DATA5; /**< Pad Mux Register, offset: 0x26C */ member16333 #define IOMUXC_SW_MUX_CTL_PAD_SD3_DATA5_REG(base) ((base)->SW_MUX_CTL_PAD_SD3_DATA5)
21764 …__IO uint32_t SW_MUX_CTL_PAD_SD3_DATA5; /**< SW_MUX_CTL_PAD_SD3_DATA5 SW MUX Contro… member22235 #define IOMUXC_SW_MUX_CTL_PAD_SD3_DATA5_REG(base) ((base)->SW_MUX_CTL_PAD_SD3_DATA5)
