Searched refs:SW_MUX_CTL_PAD_SD3_CLK (Results 1 – 2 of 2) sorted by relevance
15777 __IO uint32_t SW_MUX_CTL_PAD_SD3_CLK; /**< Pad Mux Register, offset: 0x250 */ member16326 #define IOMUXC_SW_MUX_CTL_PAD_SD3_CLK_REG(base) ((base)->SW_MUX_CTL_PAD_SD3_CLK)
21757 …__IO uint32_t SW_MUX_CTL_PAD_SD3_CLK; /**< SW_MUX_CTL_PAD_SD3_CLK SW MUX Control … member22228 #define IOMUXC_SW_MUX_CTL_PAD_SD3_CLK_REG(base) ((base)->SW_MUX_CTL_PAD_SD3_CLK)
