Searched refs:SW_MUX_CTL_PAD_QSPI1B_SCLK (Results 1 – 1 of 1) sorted by relevance
15738 __IO uint32_t SW_MUX_CTL_PAD_QSPI1B_SCLK; /**< Pad Mux Register, offset: 0x1B4 */ member16287 #define IOMUXC_SW_MUX_CTL_PAD_QSPI1B_SCLK_REG(base) ((base)->SW_MUX_CTL_PAD_QSPI1B_SCLK)
