Searched refs:SW_MUX_CTL_PAD_LCD1_HSYNC (Results 1 – 1 of 1) sorted by relevance
15706 __IO uint32_t SW_MUX_CTL_PAD_LCD1_HSYNC; /**< Pad Mux Register, offset: 0x134 */ member16255 #define IOMUXC_SW_MUX_CTL_PAD_LCD1_HSYNC_REG(base) ((base)->SW_MUX_CTL_PAD_LCD1_HSYNC)
