Searched refs:SW_MUX_CTL_PAD_GPIO1_IO10 (Results 1 – 2 of 2) sorted by relevance
15644 __IO uint32_t SW_MUX_CTL_PAD_GPIO1_IO10; /**< Pad Mux Register, offset: 0x3C */ member16193 #define IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO10_REG(base) ((base)->SW_MUX_CTL_PAD_GPIO1_IO10)
21648 …__IO uint32_t SW_MUX_CTL_PAD_GPIO1_IO10; /**< SW_MUX_CTL_PAD_GPIO1_IO10 SW MUX Contr… member22119 #define IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO10_REG(base) ((base)->SW_MUX_CTL_PAD_GPIO1_IO10)
