Searched refs:SW_MUX_CTL_PAD_GPIO1_IO07 (Results 1 – 2 of 2) sorted by relevance
15641 __IO uint32_t SW_MUX_CTL_PAD_GPIO1_IO07; /**< Pad Mux Register, offset: 0x30 */ member16190 #define IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO07_REG(base) ((base)->SW_MUX_CTL_PAD_GPIO1_IO07)
27239 …__IO uint32_t SW_MUX_CTL_PAD_GPIO1_IO07; /**< SW_MUX_CTL_PAD_GPIO1_IO07 SW MUX Contr… member27271 #define IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO07_REG(base) ((base)->SW_MUX_CTL_PAD_GPIO1_IO07)
