Searched refs:SW_MUX_CTL_PAD_GPIO1_IO03 (Results 1 – 2 of 2) sorted by relevance
15637 __IO uint32_t SW_MUX_CTL_PAD_GPIO1_IO03; /**< Pad Mux Register, offset: 0x20 */ member16186 #define IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO03_REG(base) ((base)->SW_MUX_CTL_PAD_GPIO1_IO03)
27235 …__IO uint32_t SW_MUX_CTL_PAD_GPIO1_IO03; /**< SW_MUX_CTL_PAD_GPIO1_IO03 SW MUX Contr… member27267 #define IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO03_REG(base) ((base)->SW_MUX_CTL_PAD_GPIO1_IO03)
