Searched refs:SW_MUX_CTL_PAD_GPIO1_IO02 (Results 1 – 2 of 2) sorted by relevance
15636 __IO uint32_t SW_MUX_CTL_PAD_GPIO1_IO02; /**< Pad Mux Register, offset: 0x1C */ member16185 #define IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO02_REG(base) ((base)->SW_MUX_CTL_PAD_GPIO1_IO02)
27234 …__IO uint32_t SW_MUX_CTL_PAD_GPIO1_IO02; /**< SW_MUX_CTL_PAD_GPIO1_IO02 SW MUX Contr… member27266 #define IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO02_REG(base) ((base)->SW_MUX_CTL_PAD_GPIO1_IO02)
