Searched refs:SW_MUX_CTL_PAD_GPIO1_IO01 (Results 1 – 2 of 2) sorted by relevance
15635 __IO uint32_t SW_MUX_CTL_PAD_GPIO1_IO01; /**< Pad Mux Register, offset: 0x18 */ member16184 #define IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO01_REG(base) ((base)->SW_MUX_CTL_PAD_GPIO1_IO01)
27233 …__IO uint32_t SW_MUX_CTL_PAD_GPIO1_IO01; /**< SW_MUX_CTL_PAD_GPIO1_IO01 SW MUX Contr… member27265 #define IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO01_REG(base) ((base)->SW_MUX_CTL_PAD_GPIO1_IO01)
