Searched refs:SW_MUX_CTL_PAD_GPIO1_IO00 (Results 1 – 2 of 2) sorted by relevance
15634 __IO uint32_t SW_MUX_CTL_PAD_GPIO1_IO00; /**< Pad Mux Register, offset: 0x14 */ member16183 #define IOMUXC_SW_MUX_CTL_PAD_GPIO1_IO00_REG(base) ((base)->SW_MUX_CTL_PAD_GPIO1_IO00)
27232 …__IO uint32_t SW_MUX_CTL_PAD_GPIO1_IO00; /**< SW_MUX_CTL_PAD_GPIO1_IO00 SW MUX Contr… member27264 #define IOMUXC_LPSR_SW_MUX_CTL_PAD_GPIO1_IO00_REG(base) ((base)->SW_MUX_CTL_PAD_GPIO1_IO00)
