Searched refs:SW_MUX_CTL_PAD_ENET2_TX_CLK (Results 1 – 1 of 1) sorted by relevance
15669 __IO uint32_t SW_MUX_CTL_PAD_ENET2_TX_CLK; /**< Pad Mux Register, offset: 0xA0 */ member16218 #define IOMUXC_SW_MUX_CTL_PAD_ENET2_TX_CLK_REG(base) ((base)->SW_MUX_CTL_PAD_ENET2_TX_CLK)
