Home
last modified time | relevance | path

Searched refs:SW_MUX_CTL_PAD_ENET1_CRS (Results 1 – 2 of 2) sorted by relevance

/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h15661 __IO uint32_t SW_MUX_CTL_PAD_ENET1_CRS; /**< Pad Mux Register, offset: 0x80 */ member
16210 #define IOMUXC_SW_MUX_CTL_PAD_ENET1_CRS_REG(base) ((base)->SW_MUX_CTL_PAD_ENET1_CRS)
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h21794 …__IO uint32_t SW_MUX_CTL_PAD_ENET1_CRS; /**< SW_MUX_CTL_PAD_ENET1_CRS SW MUX Contro… member
22265 #define IOMUXC_SW_MUX_CTL_PAD_ENET1_CRS_REG(base) ((base)->SW_MUX_CTL_PAD_ENET1_CRS)