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Searched refs:SWREG5 (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h105578 …__IO uint32_t SWREG5; /**< Decoder control register 2 (stream decoding … member
107778 __IO uint32_t SWREG5; /**< Decoder control register 2, offset: 0x14 */ member
111320 __IO uint32_t SWREG5; /**< control register 1, offset: 0x14 */ member
114956 __IO uint32_t SWREG5; /**< control register 1, offset: 0x14 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h105578 …__IO uint32_t SWREG5; /**< Decoder control register 2 (stream decoding … member
107778 __IO uint32_t SWREG5; /**< Decoder control register 2, offset: 0x14 */ member
111320 __IO uint32_t SWREG5; /**< control register 1, offset: 0x14 */ member
114956 __IO uint32_t SWREG5; /**< control register 1, offset: 0x14 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h105578 …__IO uint32_t SWREG5; /**< Decoder control register 2 (stream decoding … member
107778 __IO uint32_t SWREG5; /**< Decoder control register 2, offset: 0x14 */ member
111320 __IO uint32_t SWREG5; /**< control register 1, offset: 0x14 */ member
114956 __IO uint32_t SWREG5; /**< control register 1, offset: 0x14 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h101227 …__IO uint32_t SWREG5; /**< Decoder control register 2 (stream decoding … member
103246 __IO uint32_t SWREG5; /**< Decoder control register 2, offset: 0x14 */ member
106488 __IO uint32_t SWREG5; /**< control register 1, offset: 0x14 */ member
110124 __IO uint32_t SWREG5; /**< control register 1, offset: 0x14 */ member
DMIMX8ML8_cm7.h105578 …__IO uint32_t SWREG5; /**< Decoder control register 2 (stream decoding … member
107778 __IO uint32_t SWREG5; /**< Decoder control register 2, offset: 0x14 */ member
111320 __IO uint32_t SWREG5; /**< control register 1, offset: 0x14 */ member
114956 __IO uint32_t SWREG5; /**< control register 1, offset: 0x14 */ member
DMIMX8ML8_ca53.h105611 …__IO uint32_t SWREG5; /**< Decoder control register 2 (stream decoding … member
107811 __IO uint32_t SWREG5; /**< Decoder control register 2, offset: 0x14 */ member
111353 __IO uint32_t SWREG5; /**< control register 1, offset: 0x14 */ member
114989 __IO uint32_t SWREG5; /**< control register 1, offset: 0x14 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h76297 …__IO uint32_t SWREG5; /**< Decoder control register 2 (stream decoding … member
78497 __IO uint32_t SWREG5; /**< Decoder control register 2, offset: 0x14 */ member
82039 __IO uint32_t SWREG5; /**< VPU H1 Register 5, offset: 0x14 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h76297 …__IO uint32_t SWREG5; /**< Decoder control register 2 (stream decoding … member
78497 __IO uint32_t SWREG5; /**< Decoder control register 2, offset: 0x14 */ member
82039 __IO uint32_t SWREG5; /**< VPU H1 Register 5, offset: 0x14 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h76297 …__IO uint32_t SWREG5; /**< Decoder control register 2 (stream decoding … member
78497 __IO uint32_t SWREG5; /**< Decoder control register 2, offset: 0x14 */ member
82039 __IO uint32_t SWREG5; /**< VPU H1 Register 5, offset: 0x14 */ member
DMIMX8MM6_ca53.h75761 …__IO uint32_t SWREG5; /**< Decoder control register 2 (stream decoding … member
77961 __IO uint32_t SWREG5; /**< Decoder control register 2, offset: 0x14 */ member
81503 __IO uint32_t SWREG5; /**< VPU H1 Register 5, offset: 0x14 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h76297 …__IO uint32_t SWREG5; /**< Decoder control register 2 (stream decoding … member
78497 __IO uint32_t SWREG5; /**< Decoder control register 2, offset: 0x14 */ member
82039 __IO uint32_t SWREG5; /**< VPU H1 Register 5, offset: 0x14 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h76297 …__IO uint32_t SWREG5; /**< Decoder control register 2 (stream decoding … member
78497 __IO uint32_t SWREG5; /**< Decoder control register 2, offset: 0x14 */ member
82039 __IO uint32_t SWREG5; /**< VPU H1 Register 5, offset: 0x14 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h76297 …__IO uint32_t SWREG5; /**< Decoder control register 2 (stream decoding … member
78497 __IO uint32_t SWREG5; /**< Decoder control register 2, offset: 0x14 */ member
82039 __IO uint32_t SWREG5; /**< VPU H1 Register 5, offset: 0x14 */ member