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Searched refs:SWREG113 (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h103238 …__IO uint32_t SWREG113; /**< Base address for reference chroma picture in… member
107886 …__IO uint32_t SWREG113; /**< Base address LSB (bits 31:0) for reference c… member
111396 …__IO uint32_t SWREG113; /**< adaptive GOP configuration3, offset: 0x1C4 */ member
115034 …__IO uint32_t SWREG113; /**< adaptive GOP configuration3, offset: 0x1C4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h103238 …__IO uint32_t SWREG113; /**< Base address for reference chroma picture in… member
107886 …__IO uint32_t SWREG113; /**< Base address LSB (bits 31:0) for reference c… member
111396 …__IO uint32_t SWREG113; /**< adaptive GOP configuration3, offset: 0x1C4 */ member
115034 …__IO uint32_t SWREG113; /**< adaptive GOP configuration3, offset: 0x1C4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h103238 …__IO uint32_t SWREG113; /**< Base address for reference chroma picture in… member
107886 …__IO uint32_t SWREG113; /**< Base address LSB (bits 31:0) for reference c… member
111396 …__IO uint32_t SWREG113; /**< adaptive GOP configuration3, offset: 0x1C4 */ member
115034 …__IO uint32_t SWREG113; /**< adaptive GOP configuration3, offset: 0x1C4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h99012 …__IO uint32_t SWREG113; /**< Base address for reference chroma picture in… member
103354 …__IO uint32_t SWREG113; /**< Base address LSB (bits 31:0) for reference c… member
106564 …__IO uint32_t SWREG113; /**< adaptive GOP configuration3, offset: 0x1C4 */ member
110202 …__IO uint32_t SWREG113; /**< adaptive GOP configuration3, offset: 0x1C4 */ member
DMIMX8ML8_cm7.h103238 …__IO uint32_t SWREG113; /**< Base address for reference chroma picture in… member
107886 …__IO uint32_t SWREG113; /**< Base address LSB (bits 31:0) for reference c… member
111396 …__IO uint32_t SWREG113; /**< adaptive GOP configuration3, offset: 0x1C4 */ member
115034 …__IO uint32_t SWREG113; /**< adaptive GOP configuration3, offset: 0x1C4 */ member
DMIMX8ML8_ca53.h103271 …__IO uint32_t SWREG113; /**< Base address for reference chroma picture in… member
107919 …__IO uint32_t SWREG113; /**< Base address LSB (bits 31:0) for reference c… member
111429 …__IO uint32_t SWREG113; /**< adaptive GOP configuration3, offset: 0x1C4 */ member
115067 …__IO uint32_t SWREG113; /**< adaptive GOP configuration3, offset: 0x1C4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h73957 …__IO uint32_t SWREG113; /**< Base address for reference chroma picture in… member
78605 …__IO uint32_t SWREG113; /**< Base address LSB (bits 31:0) for reference c… member
82104 __O uint32_t SWREG113; /**< VPU H1 Register 113, offset: 0x1C4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h73957 …__IO uint32_t SWREG113; /**< Base address for reference chroma picture in… member
78605 …__IO uint32_t SWREG113; /**< Base address LSB (bits 31:0) for reference c… member
82104 __O uint32_t SWREG113; /**< VPU H1 Register 113, offset: 0x1C4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h73957 …__IO uint32_t SWREG113; /**< Base address for reference chroma picture in… member
78605 …__IO uint32_t SWREG113; /**< Base address LSB (bits 31:0) for reference c… member
82104 __O uint32_t SWREG113; /**< VPU H1 Register 113, offset: 0x1C4 */ member
DMIMX8MM6_ca53.h73421 …__IO uint32_t SWREG113; /**< Base address for reference chroma picture in… member
78069 …__IO uint32_t SWREG113; /**< Base address LSB (bits 31:0) for reference c… member
81568 __O uint32_t SWREG113; /**< VPU H1 Register 113, offset: 0x1C4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h73957 …__IO uint32_t SWREG113; /**< Base address for reference chroma picture in… member
78605 …__IO uint32_t SWREG113; /**< Base address LSB (bits 31:0) for reference c… member
82104 __O uint32_t SWREG113; /**< VPU H1 Register 113, offset: 0x1C4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h73957 …__IO uint32_t SWREG113; /**< Base address for reference chroma picture in… member
78605 …__IO uint32_t SWREG113; /**< Base address LSB (bits 31:0) for reference c… member
82104 __O uint32_t SWREG113; /**< VPU H1 Register 113, offset: 0x1C4 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h73957 …__IO uint32_t SWREG113; /**< Base address for reference chroma picture in… member
78605 …__IO uint32_t SWREG113; /**< Base address LSB (bits 31:0) for reference c… member
82104 __O uint32_t SWREG113; /**< VPU H1 Register 113, offset: 0x1C4 */ member