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Searched refs:SWM_PINASSIGN6_SPI1_MISO_IO_MASK (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC824/
DLPC824.h6135 #define SWM_PINASSIGN6_SPI1_MISO_IO_MASK (0xFFU) macro
6140 …int32_t)(((uint32_t)(x)) << SWM_PINASSIGN6_SPI1_MISO_IO_SHIFT)) & SWM_PINASSIGN6_SPI1_MISO_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC822/
DLPC822.h6135 #define SWM_PINASSIGN6_SPI1_MISO_IO_MASK (0xFFU) macro
6140 …int32_t)(((uint32_t)(x)) << SWM_PINASSIGN6_SPI1_MISO_IO_SHIFT)) & SWM_PINASSIGN6_SPI1_MISO_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC834/
DLPC834.h5915 #define SWM_PINASSIGN6_SPI1_MISO_IO_MASK (0xFFU) macro
5920 …int32_t)(((uint32_t)(x)) << SWM_PINASSIGN6_SPI1_MISO_IO_SHIFT)) & SWM_PINASSIGN6_SPI1_MISO_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC832/
DLPC832.h5915 #define SWM_PINASSIGN6_SPI1_MISO_IO_MASK (0xFFU) macro
5920 …int32_t)(((uint32_t)(x)) << SWM_PINASSIGN6_SPI1_MISO_IO_SHIFT)) & SWM_PINASSIGN6_SPI1_MISO_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC844/
DLPC844.h6651 #define SWM_PINASSIGN6_SPI1_MISO_IO_MASK (0xFFU) macro
6657 …int32_t)(((uint32_t)(x)) << SWM_PINASSIGN6_SPI1_MISO_IO_SHIFT)) & SWM_PINASSIGN6_SPI1_MISO_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC845/
DLPC845.h7175 #define SWM_PINASSIGN6_SPI1_MISO_IO_MASK (0xFFU) macro
7181 …int32_t)(((uint32_t)(x)) << SWM_PINASSIGN6_SPI1_MISO_IO_SHIFT)) & SWM_PINASSIGN6_SPI1_MISO_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h8639 #define SWM_PINASSIGN6_SPI1_MISO_IO_MASK (0xFFU) macro
8645 …int32_t)(((uint32_t)(x)) << SWM_PINASSIGN6_SPI1_MISO_IO_SHIFT)) & SWM_PINASSIGN6_SPI1_MISO_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h8637 #define SWM_PINASSIGN6_SPI1_MISO_IO_MASK (0xFFU) macro
8643 …int32_t)(((uint32_t)(x)) << SWM_PINASSIGN6_SPI1_MISO_IO_SHIFT)) & SWM_PINASSIGN6_SPI1_MISO_IO_MASK)