Home
last modified time | relevance | path

Searched refs:SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK (Results 1 – 8 of 8) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC824/
DLPC824.h6097 #define SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK (0xFF000000U) macro
6102 …t32_t)(((uint32_t)(x)) << SWM_PINASSIGN4_SPI0_SSEL1_IO_SHIFT)) & SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC822/
DLPC822.h6097 #define SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK (0xFF000000U) macro
6102 …t32_t)(((uint32_t)(x)) << SWM_PINASSIGN4_SPI0_SSEL1_IO_SHIFT)) & SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC834/
DLPC834.h5877 #define SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK (0xFF000000U) macro
5882 …t32_t)(((uint32_t)(x)) << SWM_PINASSIGN4_SPI0_SSEL1_IO_SHIFT)) & SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC832/
DLPC832.h5877 #define SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK (0xFF000000U) macro
5882 …t32_t)(((uint32_t)(x)) << SWM_PINASSIGN4_SPI0_SSEL1_IO_SHIFT)) & SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC844/
DLPC844.h6608 #define SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK (0xFF000000U) macro
6614 …t32_t)(((uint32_t)(x)) << SWM_PINASSIGN4_SPI0_SSEL1_IO_SHIFT)) & SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC845/
DLPC845.h7132 #define SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK (0xFF000000U) macro
7138 …t32_t)(((uint32_t)(x)) << SWM_PINASSIGN4_SPI0_SSEL1_IO_SHIFT)) & SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h8591 #define SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK (0xFF000000U) macro
8597 …t32_t)(((uint32_t)(x)) << SWM_PINASSIGN4_SPI0_SSEL1_IO_SHIFT)) & SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h8589 #define SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK (0xFF000000U) macro
8595 …t32_t)(((uint32_t)(x)) << SWM_PINASSIGN4_SPI0_SSEL1_IO_SHIFT)) & SWM_PINASSIGN4_SPI0_SSEL1_IO_MASK)