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Searched refs:STAT (Results 1 – 25 of 317) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/puf/
Dfsl_puf.c62 while (0U == base->STAT) in puf_waitForInit()
67 while ((base->STAT & PUF_STAT_BUSY_MASK) != 0U) in puf_waitForInit()
72 if (0U != (base->STAT & (PUF_STAT_SUCCESS_MASK | PUF_STAT_ERROR_MASK))) in puf_waitForInit()
324 while (0U == (base->STAT & (PUF_STAT_BUSY_MASK | PUF_STAT_ERROR_MASK))) in PUF_Enroll()
329 while (0U != (base->STAT & PUF_STAT_BUSY_MASK)) in PUF_Enroll()
331 if (0U != (PUF_STAT_CODEOUTAVAIL_MASK & base->STAT)) in PUF_Enroll()
343 if (((base->STAT & PUF_STAT_SUCCESS_MASK) != 0U) && (activationCodeSize == 0U)) in PUF_Enroll()
393 while (0U == (base->STAT & (PUF_STAT_BUSY_MASK | PUF_STAT_ERROR_MASK))) in PUF_Start()
398 while (0U != (base->STAT & PUF_STAT_BUSY_MASK)) in PUF_Start()
400 if (0U != (PUF_STAT_CODEINREQ_MASK & base->STAT)) in PUF_Start()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/drivers/lpflexcomm/lpuart/
Dfsl_lpuart.c464 base->STAT |= temp; in LPUART_Init()
526 while (0U == (base->STAT & LPUART_STAT_TC_MASK)) in LPUART_Deinit()
542 base->STAT |= temp; in LPUART_Deinit()
947 temp = (base->STAT & 0xC1FFC000UL); in LPUART_GetStatusFlags()
1015 temp = (base->STAT & 0x3E000000UL) | mask; in LPUART_ClearStatusFlags()
1016 base->STAT = temp; in LPUART_ClearStatusFlags()
1057 while ((0U == (base->STAT & LPUART_STAT_TDRE_MASK)) && (0U != --waitTimes)) in LPUART_WriteBlocking()
1059 while (0U == (base->STAT & LPUART_STAT_TDRE_MASK)) in LPUART_WriteBlocking()
1076 while ((0U == (base->STAT & LPUART_STAT_TC_MASK)) && (0U != --waitTimes)) in LPUART_WriteBlocking()
1078 while (0U == (base->STAT & LPUART_STAT_TC_MASK)) in LPUART_WriteBlocking()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/drivers/aes/
Dfsl_aes.c198 while (0U == (base->STAT & AES_STAT_IDLE_MASK)) in aes_load_key()
243 aesStat = base->STAT; in aes_one_block()
248 aesStat = base->STAT; in aes_one_block()
261 aesStat = base->STAT; in aes_one_block()
286 if (AES_STAT_REVERSE_MASK == (base->STAT & AES_STAT_REVERSE_MASK)) in aes_set_forward()
292 while (0U == (base->STAT & AES_STAT_IDLE_MASK)) in aes_set_forward()
309 if (0U == (base->STAT & AES_STAT_REVERSE_MASK)) in aes_set_reverse()
315 while (0U == (base->STAT & AES_STAT_IDLE_MASK)) in aes_set_reverse()
357 …(AES_STAT_KEY_VALID_MASK == (base->STAT & AES_STAT_KEY_VALID_MASK)) ? kStatus_Success : kStatus_In… in aes_check_key_valid()
794 aesStat = base->STAT; in aes_gcm_one_block_input_only()
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/hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_miniusart/
Dfsl_usart.c280 while (0U == (base->STAT & USART_STAT_TXIDLE_MASK)) in USART_Deinit()
448 while ((0U == (base->STAT & USART_STAT_TXRDY_MASK)) && (0U != --waitTimes)) in USART_WriteBlocking()
450 while (0U == (base->STAT & USART_STAT_TXRDY_MASK)) in USART_WriteBlocking()
466 while ((0U == (base->STAT & USART_STAT_TXIDLE_MASK)) && (0U != --waitTimes)) in USART_WriteBlocking()
468 while (0U == (base->STAT & USART_STAT_TXIDLE_MASK)) in USART_WriteBlocking()
513 while (((base->STAT & USART_STAT_RXRDY_MASK) == 0U) && (--waitTimes != 0U)) in USART_ReadBlocking()
515 while ((base->STAT & USART_STAT_RXRDY_MASK) == 0U) in USART_ReadBlocking()
527 statusFlag = base->STAT; in USART_ReadBlocking()
528 base->STAT |= statusFlag; in USART_ReadBlocking()
902 base->STAT |= USART_STAT_OVERRUNINT_MASK; in USART_TransferHandleIRQ()
[all …]
Dfsl_usart.h376 return base->STAT; in USART_GetStatusFlags()
393 base->STAT = mask; in USART_ClearStatusFlags()
/hal_nxp-latest/mcux/mcux-sdk/drivers/lpuart/
Dfsl_lpuart.c561 base->STAT |= temp; in LPUART_Init()
598 while (0U == (base->STAT & LPUART_STAT_TC_MASK)) in LPUART_Deinit()
614 base->STAT |= temp; in LPUART_Deinit()
1003 temp = base->STAT; in LPUART_GetStatusFlags()
1056 temp = (base->STAT & 0x3E000000UL) | mask; in LPUART_ClearStatusFlags()
1057 base->STAT = temp; in LPUART_ClearStatusFlags()
1098 while ((0U == (base->STAT & LPUART_STAT_TDRE_MASK)) && (0U != --waitTimes)) in LPUART_WriteBlocking()
1100 while (0U == (base->STAT & LPUART_STAT_TDRE_MASK)) in LPUART_WriteBlocking()
1117 while ((0U == (base->STAT & LPUART_STAT_TC_MASK)) && (0U != --waitTimes)) in LPUART_WriteBlocking()
1119 while (0U == (base->STAT & LPUART_STAT_TC_MASK)) in LPUART_WriteBlocking()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/components/uart/
Dfsl_adapter_lpuart.c492 s_LpuartAdapterBase[instance]->STAT = in HAL_UartInterruptHandle()
493 ((s_LpuartAdapterBase[instance]->STAT & 0x3FE00000U) | LPUART_STAT_OR_MASK); in HAL_UartInterruptHandle()
583 s_LpuartAdapterBase[instance]->STAT |= ((uint32_t)kLPUART_IdleLineFlag); in HAL_UartInterruptHandle()
1199 if ((LPUART_STAT_OR_MASK & LPUART0->STAT) || in LPUART0_LPUART1_RX_IRQHandler()
1200 ((LPUART_STAT_RDRF_MASK & LPUART0->STAT) && (LPUART_CTRL_RIE_MASK & LPUART0->CTRL)) || in LPUART0_LPUART1_RX_IRQHandler()
1201 ((LPUART_STAT_IDLE_MASK & LPUART0->STAT) && (LPUART_STAT_IDLE_MASK & LPUART0->CTRL))) in LPUART0_LPUART1_RX_IRQHandler()
1208 if ((LPUART_STAT_OR_MASK & LPUART1->STAT) || in LPUART0_LPUART1_RX_IRQHandler()
1209 ((LPUART_STAT_RDRF_MASK & LPUART1->STAT) && (LPUART_CTRL_RIE_MASK & LPUART1->CTRL)) || in LPUART0_LPUART1_RX_IRQHandler()
1210 ((LPUART_STAT_IDLE_MASK & LPUART1->STAT) && (LPUART_STAT_IDLE_MASK & LPUART1->CTRL))) in LPUART0_LPUART1_RX_IRQHandler()
1221 if ((LPUART_STAT_OR_MASK & LPUART0->STAT) || in LPUART0_LPUART1_TX_IRQHandler()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/drivers/flexcomm/usart/
Dfsl_usart.c285 while ((0U == (base->STAT & USART_STAT_TXIDLE_MASK)) && (--waitTimes != 0U)) in USART_Deinit()
287 while (0U == (base->STAT & USART_STAT_TXIDLE_MASK)) in USART_Deinit()
649 while ((0U == (base->STAT & USART_STAT_TXIDLE_MASK)) && (--waitTimes != 0U)) in USART_WriteBlocking()
651 while (0U == (base->STAT & USART_STAT_TXIDLE_MASK)) in USART_WriteBlocking()
727 statusFlag = base->STAT; in USART_ReadBlocking()
729 base->STAT |= statusFlag; in USART_ReadBlocking()
1158 if ((base->STAT & USART_STAT_RXNOISEINT_MASK) != 0U) in USART_TransferHandleIRQ()
1161 base->STAT |= USART_STAT_RXNOISEINT_MASK; in USART_TransferHandleIRQ()
1171 if ((base->STAT & USART_STAT_FRAMERRINT_MASK) != 0U) in USART_TransferHandleIRQ()
1174 base->STAT |= USART_STAT_FRAMERRINT_MASK; in USART_TransferHandleIRQ()
[all …]
Dfsl_usart.h495 … return (base->FIFOSTAT & 0xFF0000FFUL) | (base->STAT & 0xFFUL) << 16U | (base->STAT & 0xFFFF00UL); in USART_GetStatusFlags()
517 base->STAT = (mask & 0xFFFF00UL) | ((mask & 0xFF0000UL) >> 16U); in USART_ClearStatusFlags()
/hal_nxp-latest/mcux/mcux-sdk/drivers/lin/
Dfsl_lin_lpuart.c247 temp = (uint32_t)base->STAT; in LIN_LPUART_ClearStatusFlags()
260 base->STAT = temp; in LIN_LPUART_ClearStatusFlags()
281 temp = base->STAT; in LIN_LPUART_GetStatusFlags()
341 base->STAT &= ~LPUART_STAT_LBKDE_MASK; in LIN_LPUART_ProcessBreakDetect()
1053 base->STAT |= LPUART_STAT_BRK13_MASK; in LIN_LPUART_Init()
1062 base->STAT |= LPUART_STAT_LBKDE_MASK; in LIN_LPUART_Init()
1223 base->STAT &= ~LPUART_STAT_LBKDE_MASK; in LIN_LPUART_SendFrameDataBlocking()
1291 base->STAT &= ~LPUART_STAT_LBKDE_MASK; in LIN_LPUART_SendFrameData()
1408 base->STAT &= ~LPUART_STAT_LBKDE_MASK; in LIN_LPUART_RecvFrmDataBlocking()
1475 base->STAT &= ~LPUART_STAT_LBKDE_MASK; in LIN_LPUART_RecvFrmData()
[all …]
Dfsl_lin_lpuart.h182 return (((base->STAT >> LPUART_STAT_RXINV_SHIFT) & 1U) > 0U); in LIN_LPUART_GetRxDataPolarity()
187 …base->STAT = (base->STAT & ~LPUART_STAT_RXINV_MASK) | ((polarity ? 1UL : 0UL) << LPUART_STAT_RXINV… in LIN_LPUART_SetRxDataPolarity()
/hal_nxp-latest/mcux/mcux-sdk/drivers/mrt/
Dfsl_mrt.h212 …return (base->CHANNEL[channel].STAT & (MRT_CHANNEL_STAT_INTFLAG_MASK | MRT_CHANNEL_STAT_RUN_MASK)); in MRT_GetStatusFlags()
226 base->CHANNEL[channel].STAT = (mask & MRT_CHANNEL_STAT_INTFLAG_MASK); in MRT_ClearStatusFlags()
348 uint32_t reg = base->CHANNEL[channel].STAT; in MRT_ReleaseChannel()
354 base->CHANNEL[channel].STAT = reg; in MRT_ReleaseChannel()
/hal_nxp-latest/mcux/mcux-sdk/drivers/flexcomm/i2c/
Dfsl_i2c.c283 uint32_t statusMask = base->STAT; in I2C_GetStatusFlags()
568 master_state = (base->STAT & I2C_STAT_MSTSTATE_MASK) >> I2C_STAT_MSTSTATE_SHIFT; in I2C_MasterWriteBlocking()
606 …if (((base->STAT & I2C_STAT_MSTSTATE_MASK) >> I2C_STAT_MSTSTATE_SHIFT) == (uint32_t)I2C_STAT_MSTCO… in I2C_MasterWriteBlocking()
659 master_state = (base->STAT & I2C_STAT_MSTSTATE_MASK) >> I2C_STAT_MSTSTATE_SHIFT; in I2C_MasterReadBlocking()
711 …if (((base->STAT & I2C_STAT_MSTSTATE_MASK) >> I2C_STAT_MSTSTATE_SHIFT) == I2C_STAT_MSTCODE_NACKADR) in I2C_MasterCheckStartResponse()
968 master_state = (base->STAT & I2C_STAT_MSTSTATE_MASK) >> I2C_STAT_MSTSTATE_SHIFT; in I2C_MasterTransferAbort()
1117 master_state = (base->STAT & I2C_STAT_MSTSTATE_MASK) >> I2C_STAT_MSTSTATE_SHIFT; in I2C_RunTransferStateMachine()
1359 stat = base->STAT; in I2C_SlavePollPending()
1501 base->STAT |= 0u; in I2C_SlaveTransferNonBlockingInternal()
1999 uint32_t i2cStatus = base->STAT; in I2C_SlaveTransferHandleIRQ()
Dfsl_i2c.h574 base->STAT = statusMask; in I2C_ClearStatusFlags()
595 base->STAT = statusMask & (I2C_STAT_MSTARBLOSS_MASK | I2C_STAT_MSTSTSTPERR_MASK); in I2C_MasterClearStatusFlags()
680 …return ((base->STAT & (I2C_STAT_MSTPENDING_MASK | I2C_STAT_MSTSTATE_MASK)) == I2C_STAT_MSTPENDING_… in I2C_MasterGetBusIdleState()
958 base->STAT = statusMask & I2C_STAT_SLVDESEL_MASK; in I2C_SlaveClearStatusFlags()
/hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_minispi/
Dfsl_spi.c503 while (((base->STAT & SPI_STAT_TXRDY_MASK) == 0U) && (--waitTimes != 0U)) in SPI_MasterTransferBlocking()
505 while ((base->STAT & SPI_STAT_TXRDY_MASK) == 0U) in SPI_MasterTransferBlocking()
544 while (((base->STAT & SPI_STAT_RXRDY_MASK) == 0U) && (--waitTimes != 0U)) in SPI_MasterTransferBlocking()
546 while ((base->STAT & SPI_STAT_RXRDY_MASK) == 0U) in SPI_MasterTransferBlocking()
583 while (((base->STAT & SPI_STAT_MSTIDLE_MASK) == 0U) && (--waitTimes != 0U)) in SPI_MasterTransferBlocking()
585 while ((base->STAT & SPI_STAT_MSTIDLE_MASK) == 0U) in SPI_MasterTransferBlocking()
/hal_nxp-latest/mcux/mcux-sdk/drivers/spifi/
Dfsl_spifi.h235 base->STAT = SPIFI_STAT_RESET_MASK; in SPIFI_ResetCommand()
237 while ((base->STAT & SPIFI_STAT_RESET_MASK) != 0x00U) in SPIFI_ResetCommand()
294 return base->STAT; in SPIFI_GetStatusFlag()
/hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_i2c/
Dfsl_i2c.h492 return base->STAT; in I2C_GetStatusFlags()
513 base->STAT = statusMask & (I2C_STAT_MSTARBLOSS_MASK | I2C_STAT_MSTSTSTPERR_MASK); in I2C_MasterClearStatusFlags()
586 …return ((base->STAT & (I2C_STAT_MSTPENDING_MASK | I2C_STAT_MSTSTATE_MASK)) == I2C_STAT_MSTPENDING_… in I2C_MasterGetBusIdleState()
858 base->STAT = statusMask & I2C_STAT_SLVDESEL_MASK; in I2C_SlaveClearStatusFlags()
/hal_nxp-latest/mcux/mcux-sdk/drivers/rdc/
Dfsl_rdc.h205 return base->STAT; in RDC_GetStatus()
216 base->STAT = mask; in RDC_ClearStatus()
437 return (uint8_t)((base->STAT & RDC_STAT_DID_MASK) >> RDC_STAT_DID_SHIFT); in RDC_GetCurrentMasterDomainId()
/hal_nxp-latest/mcux/mcux-sdk/drivers/dcp/
Dfsl_dcp.c167 volatile uint32_t *dcpStatClrPtr = (volatile uint32_t *)&base->STAT + 2u; in dcp_clear_status()
170 while ((base->STAT & 0xffu) != 0U) in dcp_clear_status()
221 if ((base->STAT & (uint32_t)handle->channel) != (uint32_t)handle->channel) in dcp_schedule_work()
227 if ((base->STAT & (uint32_t)handle->channel) == 0U) in dcp_schedule_work()
323 if ((base->STAT & DCP_STAT_OTP_KEY_READY_MASK) == DCP_STAT_OTP_KEY_READY_MASK) in DCP_AES_SetKey()
875 while ((base->STAT & (uint32_t)handle->channel) == (uint32_t)handle->channel) in DCP_WaitForChannelComplete()
/hal_nxp-latest/imx/drivers/
Drdc.h69 return (base->STAT & RDC_STAT_DID_MASK) >> RDC_STAT_DID_SHIFT; in RDC_GetSelfDomainID()
82 return (bool)(base->STAT & RDC_STAT_PDS_MASK); in RDC_IsMemPowered()
/hal_nxp-latest/mcux/mcux-sdk/drivers/utick/
Dfsl_utick.c163 return (base->STAT); in UTICK_GetStatusFlags()
176 base->STAT = UTICK_STAT_INTR_MASK; in UTICK_ClearStatusFlags()
/hal_nxp-latest/s32/drivers/s32ze/Mcu/src/
DClock_Ip_ExtOsc.c150 …FxoscStatus = ((Clock_Ip_apxXosc[Instance]->STAT & FXOSC_STAT_OSC_STAT_MASK) >> FXOSC_STAT_OSC_STA… in Clock_Ip_ResetFxoscOsconBypEocvGmSel()
234 …FxoscStatus = ((Clock_Ip_apxXosc[Instance]->STAT & FXOSC_STAT_OSC_STAT_MASK) >> FXOSC_STAT_OSC_STA… in Clock_Ip_CompleteFxoscOsconBypEocvGmSel()
/hal_nxp-latest/s32/drivers/s32k3/Mcu/src/
DClock_Ip_ExtOsc.c239 …FxoscStatus = ((Clock_Ip_apxXosc[Instance]->STAT & FXOSC_STAT_OSC_STAT_MASK) >> FXOSC_STAT_OSC_STA… in Clock_Ip_CompleteFxoscOsconBypEocvGmSel()
363 …SxoscStatus = ((Clock_Ip_apxXosc[Instance]->STAT & SXOSC_SXOSC_STAT_OSC_STAT_MASK) >> SXOSC_SXOSC_… in Clock_Ip_CompleteSxoscOsconEocv()
/hal_nxp-latest/mcux/mcux-sdk/drivers/pxp/
Dfsl_pxp.h1292 …uint32_t status = base->STAT & (PXP_STAT_NEXT_IRQ_MASK | PXP_STAT_IRQ0_MASK | PXP_STAT_AXI_READ_ER… in PXP_GetStatusFlags()
1296 …uint32_t status = base->STAT & (PXP_STAT_NEXT_IRQ_MASK | PXP_STAT_IRQ0_MASK | PXP_STAT_AXI_READ_ER… in PXP_GetStatusFlags()
1336 … return (uint8_t)((base->STAT & PXP_STAT_AXI_ERROR_ID_0_MASK) >> PXP_STAT_AXI_ERROR_ID_0_SHIFT); in PXP_GetAxiErrorId()
1340 … return (uint8_t)((base->STAT & PXP_STAT_AXI_ERROR_ID_1_MASK) >> PXP_STAT_AXI_ERROR_ID_1_SHIFT); in PXP_GetAxiErrorId()
1343 return (uint8_t)((base->STAT & PXP_STAT_AXI_ERROR_ID_MASK) >> PXP_STAT_AXI_ERROR_ID_SHIFT); in PXP_GetAxiErrorId()
/hal_nxp-latest/mcux/mcux-sdk/drivers/elcdif/
Dfsl_elcdif.h507 …return base->STAT & (LCDIF_STAT_LFIFO_FULL_MASK | LCDIF_STAT_LFIFO_EMPTY_MASK | LCDIF_STAT_TXFIFO_… in ELCDIF_GetStatus()
526 return (base->STAT & LCDIF_STAT_LFIFO_COUNT_MASK) >> LCDIF_STAT_LFIFO_COUNT_SHIFT; in ELCDIF_GetLFifoCount()

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