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Searched refs:STARTUP_XSPI1_CACHE_POLICY (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
Dsystem_MIMXRT735S_cm33_core0.h88 #ifndef STARTUP_XSPI1_CACHE_POLICY
89 #define STARTUP_XSPI1_CACHE_POLICY STARTUP_XSPI_CACHE_POLICY_WRITE_BACK macro
Dsystem_MIMXRT735S_cm33_core0.c117 #if STARTUP_XSPI1_CACHE_POLICY in SystemInit()
122 CACHE64_POLSEL1->POLSEL = STARTUP_XSPI1_CACHE_POLICY; in SystemInit()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
Dsystem_MIMXRT798S_cm33_core0.h88 #ifndef STARTUP_XSPI1_CACHE_POLICY
89 #define STARTUP_XSPI1_CACHE_POLICY STARTUP_XSPI_CACHE_POLICY_WRITE_BACK macro
Dsystem_MIMXRT798S_cm33_core0.c117 #if STARTUP_XSPI1_CACHE_POLICY in SystemInit()
122 CACHE64_POLSEL1->POLSEL = STARTUP_XSPI1_CACHE_POLICY; in SystemInit()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
Dsystem_MIMXRT758S_cm33_core0.h88 #ifndef STARTUP_XSPI1_CACHE_POLICY
89 #define STARTUP_XSPI1_CACHE_POLICY STARTUP_XSPI_CACHE_POLICY_WRITE_BACK macro
Dsystem_MIMXRT758S_cm33_core0.c117 #if STARTUP_XSPI1_CACHE_POLICY in SystemInit()
122 CACHE64_POLSEL1->POLSEL = STARTUP_XSPI1_CACHE_POLICY; in SystemInit()